Silicon Analysts Weekly · Issue #9 · week of 2026-08-03 → 2026-08-10
TSMC N5 +5.7% WoW; Samsung HBM3E 12-Hi now volume shipping to NVIDIA
Silicon Analysts Weekly for the week of 2026-08-03 to 2026-08-10: TSMC N5 +5.7% WoW; Samsung HBM3E 12-Hi now volume shipping to NVIDIA. A sourced, provenance-marked briefing on AI-chip supply-chain and pricing movements — HBM spot prices, wafer pricing, foundry and CoWoS capacity, per-chip bill-of-materials cost, and HBM qualification status — derived from public data and human-reviewed. Part of the Silicon Analysts semiconductor data layer.
The take
TSMC N5 wafer prices moved up 5.7% in a single week — against a backdrop where CoWoS-L capacity is still scaling from 40K to ~65K wafers/month and NVIDIA holds roughly 60% of that allocation. Samsung's HBM3E 12-Hi reaching volume shipments to NVIDIA matters because it adds a third qualified supplier to a market where DRAM contract prices surged 90–95% QoQ; readers tracking B200/Blackwell pricing should watch whether that second source loosens spot allocation at all.
What moved this week
Broadcom CoWoS customer allocation — changed — ~15% of CoWoS allocation (~150,000–200,000 wafers in 2026) vs 2026-Q4 150,000 CoWoS wafers; 15% of total demand (source)
NVIDIA CoWoS-L customer allocation — changed — ~510,000 CoWoS-L wafers at TSMC in 2026 (~60% of TSMC's total CoWoS allocation) vs 2026-Q4 595,000 CoWoS wafers; ~60% of total global demand (source)
SK Hynix HBM bit share — flat — 2026 over 60% (broadly consistent with 'over half') vs Q3 2025 57% (source)
Micron HBM bit share — changed — ~20–21% vs Q2 2025 21% (source)
TSMC CoWoS capacity — up — 40K wafers/month (end-2024) rising to ~65K wafers/month (end-2025) vs ~65K–80K wafers per month by end of 2025 (end-2024 baseline ~40K wpm; SoIC sub-capacity… (source)
NVIDIA CoWoS customer allocation — null — ~60% of TSMC CoWoS capacity in 2026 (share estimates range 55–65% across analysts… vs 2027 flagship booking holder (source)
TSMC N5 wafer price (avg) — +5.7% WoW
TSMC N5 wafer price (low) — +5.7% WoW
TSMC N5 wafer price (high) — +5.7% WoW
Supply-chain & pricing signals
SK Hynix invests 54T won in Y2/M17 fabs to expand HBM capacity through 2033 — SK Hynix's multi-year capacity expansion directly addresses the AI memory supply crunch. Y1 cleanroom (Feb 2027), M17 (Dec 2028), and Y2 (Jun 2029) will add significant HBM production, though 12-18 month yield ramps mean material relief delayed to 2028-2030. This locks in Korean dominance of HBM supply through decade-end. (SK Hynix Newsroom) · _In our data:_ SK Hynix — 13 developments tracked this quarter · SK Hynix storyline · HBM price by generation · HBM market share by vendor
Lam Research raises advanced packaging growth outlook to 70% YoY; 2.5D/3.5D transitions accelerating — Advanced packaging equipment demand surging as AI packages scale beyond 9x reticle size (vs. 3x today). Shift toward panel-level architectures and denser copper/mega-pillar structures signals manufacturing bottleneck shifting from compute to substrate/interconnect assembly. Supply chain stress propagating downstream. (AOL (Lam Research Q4 2026 Earnings)) · _In our data:_ packaging tech storyline
SK Hynix invests 54 trillion won in Y2 and M17 fabs for AI memory capacity — Major capital deployment signals confidence in sustained AI memory demand and positions SK Hynix to capture long-term HBM market share. Investment secures mid-to-long-term production capacity alignment with NVIDIA partnership announced in June 2026. (SK Hynix Newsroom) · _In our data:_ SK Hynix — 13 developments tracked this quarter · SK Hynix storyline · HBM price by generation · HBM market share by vendor
US imposes 15% tariff on polysilicon derivatives; 50% domestic content required by 2026 — Trade restrictions on polysilicon will increase semiconductor wafer and material costs domestically, affecting chipmakers' capex and supply-chain planning. China's 90% global polysilicon dominance makes these tariffs difficult to circumvent, creating long-term cost inflation for US-based manufacturers. (CryptoBriefing) · _In our data:_ foundry economics storyline
DRAM contract prices surge 90-95% QoQ in Q1 2026; all HBM suppliers fully allocated — Record single-quarter memory price spike reflects acute HBM supply shortage. Apacer warning of 70% YoY chip supply decline in 2027 signals continued tight supply until new capacity ramps. Enterprise IT buyers face sustained pricing pressure and allocation constraints through 2028. (Techtimes) · _In our data:_ HBM — 8 developments tracked this quarter · HBM storyline · HBM price by generation · HBM market share by vendor
Samsung achieves 'golden yield' on HBM4, escalating competition with SK Hynix — Samsung's yield improvements on HBM4 directly challenge SK Hynix's market dominance and enable increased supply to AI data center customers. This intensifies the HBM supply war, potentially driving down prices and forcing competitors to accelerate their own production roadmaps. (Korean Press (Google News)) · _In our data:_ SK Hynix — 13 developments tracked this quarter · SK Hynix storyline · HBM price by generation · HBM market share by vendor
HBM watch
Samsung × NVIDIA (HBM3E 12-Hi): now Volume shipping — Jensen Huang confirmed all three HBM suppliers passed qualification and are in active production, competing to supply NVIDIA. (source · timeline)
Foundry & capacity
SK Hynix Y2/M17 expansion — 54 trillion won committed across Y1 cleanroom (Feb 2027), M17 (Dec 2028), and Y2 (Jun 2029); yield ramps push material HBM relief to 2028–2030.
Lam Research advanced packaging outlook — raised advanced packaging equipment growth guidance to 70% YoY; AI packages now scaling beyond 9× reticle size versus ~3× today.
Polysilicon tariffs — US imposed 15% tariff on polysilicon derivatives with 50% domestic content required by 2026; China holds ~90% of global supply, making cost inflation for US-based manufacturers structural rather than transient.
This week's analysis
AMD Zen 6 Low-Power Cores: Architectural Stakes, Process Economics, and Intel's Narrowing Window — AMD's Zen 6 architecture introduces a three-tier core hierarchy — Performance, Efficiency, and a new LP class — that challenges Intel's E-core strategy on silicon economics and scheduler performance. This analysis examines the competitive, process, and procurement implications for corporate decision-makers.
Meta's Vistara and the Hyperscaler Memory Arbitrage Playbook: How CXL 2.0 Turns DDR4 Retirement Into a Capex Lever — Meta's custom Vistara ASIC deploys CXL 2.0 to reuse DDR4 memory at scale, cutting AI inference server counts and out-of-memory failures. We examine the cost architecture, HBM capex deferral logic, and what this signals for hyperscaler custom silicon strategy.
NVIDIA Faces Massive Growth Expectations Amid Strong AI Infrastructure Investments — NVIDIA's $4.3T market cap reflects extraordinary growth expectations baked in by hyperscaler AI capex cycles. This analysis unpacks the manufacturing economics, supply-chain constraints, and competitive dynamics that will determine whether those expectations are met.
AI engines are citing
Tool spotlight
Cost Bridge — Side-by-side manufacturing-cost breakdown across 13+ AI chips.
Sources this week
Get the next issue in your inbox
One short, sourced email a week on the AI-chip supply chain — only when the data moves.
One short email a week — only when the data moves. No marketing, ever. One-click unsubscribe.
More recent issues
Sourced public intelligence, not insider data; status changes are human-reviewed before publication. Full timelines on the HBM Qualification Tracker.