Historical Semiconductor Market Data (2004–2026)
Time series data on TSMC wafer prices by process node, HBM pricing by generation, DDR4 contract and spot prices, CoWoS advanced packaging capacity, fab utilization rates, chip design NRE costs, and AI accelerator manufacturing cost breakdowns. All data sourced and cited from analyst reports, earnings transcripts, and industry publications.
Historical Semiconductor Market Data
Time series on wafer prices, HBM and DRAM pricing, CoWoS capacity, fab utilization, capex and cloud GPU rates — sourced and cited, one row per series.
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| Dataset | Latest | Period |
|---|---|---|
| Wafer Pricing | ||
| TSMC Wafer Price by Node | $20,000/wafer | 3nm (2024) |
| Foundry Wafer Price Comparison | — | — |
| Memory | ||
| HBM Price per GB by Generation | $15.6/GBmodelHBM3E (Contract) | 2026 (≈+20% renewals) |
| HBM Market Share by Vendor | 50%SK Hynix (quarterly) | Q2 2026 |
| DDR4 8Gb Contract & Spot Price | $35.9/unitDDR4 8Gb (spot) | Jun 2026 |
| NAND Flash Pricing | $0.18/GBEnterprise SSD (TLC) | Q1 2026 |
| Packaging | ||
| CoWoS Packaging Capacity (TSMC) | 72,500 wafers/month | End 2025 |
| Utilization | ||
| Fab Capacity Utilization | 85%UMC Mature (>14nm) | Q2 2026 |
| NRE / Design Cost | ||
| Chip Design & NRE Cost by Node | $585MIBS Total Design Cost | 3nm |
| AI Chip BOM | ||
| AI Accelerator Manufacturing Cost (COGS) | $6,750total | B200 (2025) |
| AI Server System BOM & Rack Cost | $751Kmodeltotal | GB200 NVL72 (2024) |
| Supply Chain | ||
| Semiconductor Component Lead Times | 28 weeksmodelCoWoS-S | Q1 2026 |
| Semiconductor Capex by Company | $40.9BTSMC | 2025 |
| Hyperscaler AI Capex by Company | $44.2BAmazon | Q1 2026 |
| Cloud Pricing | ||
| AI Chip Cloud Spot Price | $2.12/hrmodelH100 (Spot Market) | Q2 2026 |
| GPU Rental Price per Effective FP8 PFLOP | $1.01/hr per PFLOPmodelH100 (on-demand median) | Q2 2026 |
Reference pages
Sourced current-state tables under /data; each page prints its own vintage. Where a chart above has a reference twin, the twin is linked in both directions.
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How this data is sourced
Sources. All data is compiled from public sources including analyst reports, earnings transcripts, industry publications, and expert blogs. Every data point includes its source citation.
Confidence ratings. Each data point carries a confidence level (High, Medium, Low) based on source quality and corroboration. High = confirmed by multiple independent sources or official reports. Medium = analyst consensus from reputable firms. Low = single-source estimates or inference.
Projections. Forward-looking data points are clearly marked with dashed lines on charts and “Projection” labels in tooltips. These are analyst forecasts, not confirmed values.
Data gaps. Where data is sparse (e.g., pre-2022 HBM pricing), we do not interpolate or fabricate data points. Gaps in charts represent genuine absence of reliable public data.
Disclaimer. Semiconductor companies (TSMC, NVIDIA, etc.) do not publicly disclose most pricing data. All figures are analyst estimates unless marked as “Confirmed.” Volume discounts and contractual terms can vary significantly from published estimates.
Semiconductor Market Data FAQ
- Where does Silicon Analysts get its semiconductor pricing data?
- All data is compiled from public sources including analyst reports (Morgan Stanley, Goldman Sachs, TrendForce), earnings transcripts, industry publications (SemiAnalysis, SemiWiki), and expert blogs. Every data point includes its source citation and confidence rating (High, Medium, or Low).
- How much does a TSMC wafer cost in 2026?
- TSMC wafer processing costs range from approximately $3,000 for 28nm to $20,000 for 3nm (N3E) and an estimated $28,000–30,000 for 2nm (N2). TSMC does not publicly disclose pricing; all figures are analyst estimates. Volume discounts of 15–30% apply for large customers like Apple and NVIDIA.
- What is the current price of HBM memory?
- As of early 2026, HBM3E contract pricing is approximately $13–17 per GB, down from a peak of $17–20/GB in H1 2025. HBM4 is projected at approximately $14/GB for initial production. SK Hynix commands a premium over Samsung, which discounts approximately 30% below SK Hynix to win design slots.
- How often is the market data updated?
- Update cadence varies by dataset: wafer pricing is updated annually (TSMC announces hikes each January), HBM and DRAM spot pricing is updated monthly from TrendForce reports, fab utilization is updated quarterly from earnings transcripts, and cloud GPU pricing is updated monthly from provider pricing pages.
- What does the confidence rating on data points mean?
- High confidence means the figure is confirmed by multiple independent sources or official company reports. Medium confidence indicates analyst consensus from reputable firms. Low confidence means a single-source estimate or inference. Projections are clearly marked separately.
- How much does it cost to manufacture an NVIDIA H100 GPU?
- The estimated total manufacturing cost (COGS) for an NVIDIA H100 SXM5 is approximately $3,320, broken down as roughly $300 for the TSMC 4N logic die, $1,350 for HBM3 memory, $750 for CoWoS-S packaging, and $920 for test and assembly. NVIDIA sells the H100 at approximately $28,000, implying roughly 88% gross margin.
- What is CoWoS packaging capacity in 2026?
- TSMC CoWoS advanced packaging capacity is projected to reach 120,000–130,000 wafers per month by end of 2026, up from 13,000 wpm at end of 2023. This roughly 10x expansion in three years reflects the critical role CoWoS plays in AI accelerator manufacturing.
- Is the market data available via API?
- Yes. The Silicon Analysts Data API provides programmatic access to market data at /api/v1/market-data. The API returns JSON with full data points, source citations, and confidence ratings. No API key is required for free-tier access.