Historical Semiconductor Market Data (2004–2026)
Time series data on TSMC wafer prices by process node, HBM pricing by generation, DDR4 contract and spot prices, CoWoS advanced packaging capacity, fab utilization rates, chip design NRE costs, and AI accelerator manufacturing cost breakdowns. All data sourced and cited from analyst reports, earnings transcripts, and industry publications.
Historical Semiconductor Market Data
Time series data on wafer prices, HBM pricing, DRAM cycles, and fab utilization — sourced and cited.
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TSMC Wafer Price by Node
Estimated 300mm wafer prices at TSMC across 11 process nodes from 90nm (2004) through A16 (2026+), including 16nm and 6nm intermediate nodes. All figures are analyst estimates — TSMC does not publicly disclose pricing.
Foundry Wafer Price Comparison
Side-by-side wafer price comparison across TSMC, Samsung, and SMIC at comparable nodes.
HBM Price per GB by Generation
HBM contract pricing per GB from HBM2 through HBM4, quarterly 2020–2026. Now with Q3–Q4 2024 peak pricing data. Tracks the AI demand supercycle impact.
HBM Market Share by Vendor
HBM market share split between SK Hynix, Samsung, and Micron, annually from 2023 through 2026E. Tracks SK Hynix dominance eroding as Samsung and Micron ramp HBM3E.
DDR4 8Gb Contract & Spot Price
DDR4 8Gb quarterly contract and spot pricing 2022–2026. Now with full quarterly cadence including the historic $1.63→$12.76 spot price reversal in 2025.
CoWoS Packaging Capacity (TSMC)
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
Fab Capacity Utilization
TSMC and UMC utilization rates quarterly from Q3 2022 through H1 2025, showing the two-speed recovery: leading-edge at 100% vs mature nodes declining from 100% to 65% then slowly recovering.
Chip Design & NRE Cost by Node
Total chip design cost escalation from 180nm to 2nm. IBS figures shown alongside real-world startup estimates.
AI Accelerator Manufacturing Cost (COGS)
Estimated manufacturing cost breakdown for NVIDIA A100, H100, H200, B200 and AMD MI300X. Shows HBM shift from 33% to 45%+ of BOM.
Semiconductor Component Lead Times
Lead times in weeks for key AI chip supply chain components: CoWoS packaging, HBM memory by generation, TSMC leading-edge wafers. Tracks the bottleneck cycle from 2022–2026.
Semiconductor Capex by Company
Annual capital expenditure by leading semiconductor companies — TSMC, Samsung, Micron, SK Hynix, and Intel. A leading indicator of future capacity additions 12–18 months out.
NAND Flash Pricing
NAND flash pricing for enterprise SSD (TLC) and consumer SSD (TLC/QLC), quarterly 2022–2026. Tracks the AI-driven enterprise NAND shortage and its impact on consumer SSD prices.
AI Server System BOM & Rack Cost
Full system-level bill of materials for AI training servers — from DGX H100 (8-GPU) through GB200 NVL72 (72-GPU rack). Tracks how rack economics evolved as HBM and networking costs exploded.
AI Chip Cloud Spot Price
Hourly rental cost for AI GPUs on major cloud platforms — CoreWeave, AWS, and spot markets (Vast.ai/Lambda). Tracks the H100→B200 generational transition and supply-driven price volatility.
Semiconductor Market Data FAQ
- Where does Silicon Analysts get its semiconductor pricing data?
- All data is compiled from 725+ public sources including analyst reports (Morgan Stanley, Goldman Sachs, TrendForce), earnings transcripts, industry publications (SemiAnalysis, SemiWiki), and expert blogs. Every data point includes its source citation and confidence rating (High, Medium, or Low).
- How much does a TSMC wafer cost in 2026?
- TSMC wafer processing costs range from approximately $3,000 for 28nm to $20,000 for 3nm (N3E) and an estimated $28,000–30,000 for 2nm (N2). TSMC does not publicly disclose pricing; all figures are analyst estimates. Volume discounts of 15–30% apply for large customers like Apple and NVIDIA.
- What is the current price of HBM memory?
- As of early 2026, HBM3E contract pricing is approximately $13–17 per GB, down from a peak of $17–20/GB in H1 2025. HBM4 is projected at approximately $14/GB for initial production. SK Hynix commands a premium over Samsung, which discounts approximately 30% below SK Hynix to win design slots.
- How often is the market data updated?
- Update cadence varies by dataset: wafer pricing is updated annually (TSMC announces hikes each January), HBM and DRAM spot pricing is updated monthly from TrendForce reports, fab utilization is updated quarterly from earnings transcripts, and cloud GPU pricing is updated monthly from provider pricing pages.
- What does the confidence rating on data points mean?
- High confidence means the figure is confirmed by multiple independent sources or official company reports. Medium confidence indicates analyst consensus from reputable firms. Low confidence means a single-source estimate or inference. Projections are clearly marked separately.
- How much does it cost to manufacture an NVIDIA H100 GPU?
- The estimated total manufacturing cost (COGS) for an NVIDIA H100 SXM5 is approximately $3,320, broken down as roughly $300 for the TSMC 4N logic die, $1,350 for HBM3 memory, $750 for CoWoS-S packaging, and $920 for test and assembly. NVIDIA sells the H100 at approximately $28,000, implying roughly 88% gross margin.
- What is CoWoS packaging capacity in 2026?
- TSMC CoWoS advanced packaging capacity is projected to reach 120,000–130,000 wafers per month by end of 2026, up from 13,000 wpm at end of 2023. This roughly 10x expansion in three years reflects the critical role CoWoS plays in AI accelerator manufacturing.
- Is the market data available via API?
- Yes. The Silicon Analysts Data API provides programmatic access to market data at /api/v1/market-data. The API returns JSON with full data points, source citations, and confidence ratings. No API key is required for free-tier access.