N2 entered high-volume manufacturing in 4Q25 at TSMC's Hsinchu and Kaohsiung sites with good yield (TSMC 4Q25 call, 2026-01-15); TSMC's FY2025 Form 20-F lists Fab 20 and Fab 22 at 2 nm. N2 was 3% of TSMC wafer revenue in 2Q26 and 8% in 3Q26, and TSMC expects N2-family annual capacity to more than double in 2027 (TSMC 2Q26 call, 2026-07-16; 3Q26 call, 2026-10-15). TSMC has not said N2 is fully booked, gives no N2 yield percentage and does not comment on individual customers. On its 4Q25 call TSMC said A16 volume production was on track for 2H 2026. The allocation tier is a Silicon Analysts estimate, not a TSMC statement.

📡 Latest signal (2026-10-12): “90,000 wafers/month at end-2026, rising to 110,000 by mid-2027”

N3 was 28% of TSMC wafer revenue in 4Q25 and 33% in 3Q26 (TSMC 4Q25 call, 2026-01-15; 3Q26 call, 2026-10-15). TSMC says it historically does not add capacity to a node once it reaches its targeted capacity, but is adding N3 fabs to support a robust multiyear pipeline of demand for 3-nanometer technologies (3Q26 call). On its 1Q26 call (2026-04-16) TSMC said that while capacity is tight it does not pick and choose or play favorites among its customers. TSMC's 4Q25-3Q26 calls give no N3 utilization figure and mention no suspension of new projects and no expedite (hot-run) pricing; this record's utilization of 98% and its allocation tier are Silicon Analysts estimates, not TSMC figures. FAB LIST CORRECTED 2026-09-12: Fab 15 removed - TSMC's FY2025 Form 20-F (fab table: most advanced technology for volume production, as of 2025 year-end) lists Fab 15 at 7 nm, as it has in every filing since FY2018, so the 19.5 kWSPM of N3 the registry attributed to it was not TSMC volume production. With that slice gone the per-fab roll-up is Fab 18 P4-8 alone at 190, which equals capacity_target_2026 exactly; the 10% residual the reconciliation carried was entirely that attribution.

📡 Latest signal (2026-10-12): “180,000 wafers per month by Q4 2026”

SMIC reported 2025 revenue of USD 9,327 million, up 16.2%, and capacity utilization of 95.7% in 4Q25 (SMIC 4Q25 results, 2026-02-10), and utilization of 93.7% in 2Q26 (SMIC 2Q26 results, 2026-08-13). Both utilization figures are company-wide: SMIC discloses no 7nm capacity, revenue or customer. The Huawei products and customer share in this record come from press reports, not SMIC, and the 7nm utilization, capacity and allocation tier are Silicon Analysts estimates.

📡 Latest signal (2026-10-26): “93.7%”

N5 was 35% of TSMC wafer revenue in 4Q25 and 28% in 3Q26 (TSMC 4Q25 call, 2026-01-15; 3Q26 call, 2026-10-15). TSMC's first Arizona fab entered high-volume production in 4Q24, and TSMC said its Arizona yield and defect density are almost equal to Taiwan's (4Q25 call). TSMC's 4Q25-3Q26 calls contain no N5 booking statement, utilization figure or price change; asked about reported price increases, TSMC said its pricing is strategic and depends on market segment, location and technology (3Q26 call). This record's utilization of 97% and its allocation tier are Silicon Analysts estimates, not TSMC figures. CAPACITY RESTATED 2026-09-02: was 280/280. Three independent internal surfaces put N5/N4 at 200-250 kwspm and none supported 280 - the per-fab roll-up across Fab 12/14/15/18-P1-3/21-P1 gives 219.7 (2025) and 229.7 (2026), and TSMC 2Q26 IR (USD 40.20B revenue x 33% N5 share, 4,336k wafers shipped) implies ~246 kwspm at our own published tsmc-n5 wafer price of USD 18,500. Holding 280 would have required an N5 ASP near USD 16,300, contradicting that published price. Set to that roll-up on 2026-09-02. FAB LIST CORRECTED 2026-09-12: Fab 12, 14 and 15 removed - TSMC's FY2025 Form 20-F (fab table: most advanced technology for volume production, as of 2025 year-end) lists them at 40, 16 and 7 nm respectively (Fab 14 and 15 at those values in every filing since FY2018), so the 80 kWSPM of N5 the registry parked at them was not TSMC volume production and the 0% match it produced was an artifact. The roll-up across the fabs still listed, Fab 18 P1-3 and Fab 21 P1, is 150. The 230 stands because it has independent support (the IR-implied ~246); the gap says the fab-side N5 at Fab 18 P1-3 is understated, or that N5 volume also runs at a fab whose filed ceiling is lower - the filing gives ceilings, not capacity, and the per-fab totals are unsourced. Not fitted.

📡 Latest signal (2026-10-12): “~180k wafers per month declining to 150k then 130k”

Samsung commenced mass production of first-generation 2nm products in 4Q25 and plans to ramp second-generation 2nm products in 2026 (Samsung 4Q25 results, 2026-01-29); it describes the Exynos 2600 as based on the industry's first 2nm GAA process (Samsung Semiconductor). In 2Q26 Samsung said design wins with major customers continued to expand, with 2nm HPC engagements as a notable example (2Q26 results, 2026-07-30). Samsung's DART filing of 2025-07-28 discloses a KRW 22.76 trillion (about USD 16.5B) foundry supply contract running to 2033-12-31, and a 2025-07-31 amendment names Tesla as the counterparty. Samsung discloses no 2nm yield, capacity or customer split; this record's capacity, customer shares and allocation tier are Silicon Analysts estimates.

📡 Latest signal (2026-10-12): “33%”

Samsung's HBM4, in mass production and shipped to customers as of 2026-02-12, uses a 4nm logic base die; Samsung calls the shipment an industry first (Samsung Newsroom, 2026-02-12). Samsung said its 2Q26 Foundry earnings before incentive-related provisions improved significantly on HBM base-die demand and strong orders from U.S. customers, and that in 2H26 it plans to expand sales of LPU and base-die products on its 4nm process (2Q26 results, 2026-07-30); for 2Q26 it had planned full utilization of its advanced-node lines (1Q26 results, 2026-04-30). Reported, not a Samsung statement: Samsung will allocate over half of its Pyeongtaek foundry capacity (no node split given) to in-house HBM4 base dies (Hankyung via TrendForce, 2026-03-20). Reported, not a Samsung statement: Tsavorite Scalable Intelligence is using Samsung's SF4X (4nm-family) process to fabricate its Omni Processing Unit (Reuters, 2025-11-10), and Samsung is producing Tesla's AI4 chip, formerly HW4, on 4nm (heise online, 2025-07-28), although an earlier report put that chip on Samsung's 7nm process (KED Global, 2021-09-23). Samsung discloses no per-node capacity, utilization or customer split, so this record gives no utilization figure; its capacity, customer shares and allocation tier are Silicon Analysts estimates.

📡 Latest signal (2026-10-12): “33%”

Intel 18A first went into high-volume manufacturing in late 2025, with the Intel Core Ultra Series 3 processors as the first 18A products (Intel FY2025 Form 10-K); Intel says it released those first 18A products at the start of 2026 (Intel 2Q26 Form 10-Q). Intel discloses no 18A yield figure: on 2026-07-23 it said 18A yields continue to track ahead of expectations, with 18A output about 25% above target in 2Q26 (Intel 2Q26 remarks). Intel Foundry external revenue was USD 293M in 2Q26 and USD 467M in 1H26, up mainly because Altera became an external customer after its deconsolidation in 3Q25, and Intel says substantially all of Intel Foundry supports internal manufacturing (Intel 2Q26 Form 10-Q). Intel says 18A-P, in risk production since June 2026, is designed for future Intel products and external foundry customers (same 10-Q). Capacity and the allocation tier are Silicon Analysts estimates.

Rapidus, Preferred Networks (PFN) and SAKURA internet reached a basic agreement under which Rapidus manufactures the latest model of AI semiconductors in the MN-Core series to be designed by PFN (Rapidus, 2025-01-08). Rapidus said its pilot line at the IIM-1 foundry in Chitose would start up in April 2025 (Rapidus, 2025-04-01), and on 2025-07-18 that prototyping of 2nm GAA transistors had started there, with prototype wafers obtaining electrical characteristics, and that it will begin mass production in 2027 (Rapidus, 2025-07-18). Rapidus says its funding from capital increases now totals 424.95 billion JPY, including private-sector funding of 167.6 billion JPY from 32 companies such as Canon, Fujitsu, NTT, SoftBank and Sony Group; that total does not include the NEDO subsidies it has received since FY2022 (Rapidus, 2026-06-05). The capacity values and allocation tier in this record are Silicon Analysts estimates.

N7 was 14% of TSMC wafer revenue in 4Q25 and 10% in 3Q26 (TSMC 4Q25 call, 2026-01-15; 3Q26 call, 2026-10-15). TSMC gives no N7 utilization figure; this record's utilization and allocation tier are Silicon Analysts estimates. CAPACITY CORROBORATED 2026-09-02: TSMC 2Q26 IR (USD 40.20B x 11% N7 share, 4,336k wafers shipped) implies 208-239 kwspm of N7 capacity at an assumed 65% utilization (our estimate) across our published wafer-price range (USD 9,500-10,900). capacity_current 200 sits just below that band and target_2026 170 is an exit-2026 figure on a declining node, so both are consistent. FAB LIST CORRECTED 2026-09-12: Fab 12 and Fab 14 removed. The 2026-09-02 reading - that the per-fab roll-up of 274.8 sat above the band because the fab SPLITS were stale - was right that the fab side was wrong and wrong about why: TSMC's FY2025 Form 20-F (fab table: most advanced technology for volume production, as of 2025 year-end) lists Fab 12 at 40 nm (after reading 7, 5 and 3 nm in FY2018-23 while each node piloted there) and Fab 14 at 16 nm in every filing since FY2018. Neither runs N7 in volume; the splits were not stale, the nodes were misattributed. The roll-up is now Fab 15 alone at 130, BELOW the band - so the open question moves to Fab 15: its 130 total is an unsourced estimate across seven phases, and if it is right then N7 volume also runs at a fab whose filed ceiling is lower (Fab 18 is the only candidate; the filing gives ceilings, not capacity). Not fitted.

📡 Latest signal (2026-10-26): “close to 90% device [yield implied from product-like vehicle]”

TSMC's nodes above 7nm (all wafer revenue outside its advanced technologies, a wider set than this record's 16-40nm band) were 23% of its wafer revenue in 4Q25 and 21% in 3Q26 (TSMC 4Q25 call, 2026-01-15; 3Q26 call, 2026-10-15). TSMC says it continues to increase, not decrease, mature-node capacity in higher value-added segments, for example JASM Fab 1 in Japan for CMOS image sensors and ESMC in Germany for automotive and industrial applications, and that outside power management ICs and CMOS image sensors mature-node demand in other commodity areas is not that strong (2Q26 call, 2026-07-16). TSMC's calls give no mature-node utilization figure or Fab 14 capacity plan; this record's utilization and allocation tier are Silicon Analysts estimates. FAB LIST CORRECTED 2026-09-12: Fab 12 (40 nm) and Fab 14 (16 nm) added - TSMC's FY2025 Form 20-F (fab table: most advanced technology for volume production, as of 2025 year-end) puts both inside this record's N16/12 + N28/40 band. Their 100 and 120 kWSPM totals were sized when the registry modelled them as N7/N5 fabs and are unsourced, so the per-fab roll-up now reads 494 against a stated 330; which side is off is not something the filing can settle. Not fitted.

📡 Latest signal (2026-10-12): “90,000 wafers/month at end-2026, rising to 110,000 by mid-2027”

Samsung marked its first shipment of 3nm GAA foundry chips at its Hwaseong V1 line on 2022-07-25 (Samsung Semiconductor newsroom) and built the Exynos 2500 on its 3nm GAA process (Samsung Semiconductor). Reported, not a Samsung statement: the existing 3nm line at S3 was expected to be fully converted to a 2nm line by the end of 2025 (Business Korea via TrendForce, 2024-10-04). Samsung's 1Q26 and 2Q26 results do not mention the conversion. Samsung discloses no 3nm yield, utilization, capacity or customer list; this record's utilization, capacity and allocation tier are Silicon Analysts estimates.

📡 Latest signal (2026-10-12): “33%”

GlobalFoundries reported FY2025 revenue of USD 6.791B, up 1% from USD 6.750B (GF 4Q25 results, 2026-02-11). On its 4Q25 call GF said its 2025 shipments of about 2.3 million 300mm-equivalent wafers, up 10% from 2024, equated to utilization of approximately 85%, that full-year automotive revenue grew about 17% to a record USD 1.4B, and that silicon photonics revenue roughly doubled to over USD 200M (GF 4Q25 call, 2026-02-11). That utilization covers all of GF's shipments, not only this record's 12-22nm band: this record's utilization (85) is GF's company-wide figure, and its allocation tier is a Silicon Analysts estimate. CAPACITY RESTATED 2026-09-02: was 200/215, which measured the WRONG SCOPE - 200 equalled the entire modelled 2026 capacity of GF across all four fabs (70+50+20+60), including Burlington, which runs 90/130/180nm and contributes nothing to the 12-22nm band of this record. Now the band only: 97.8 (2025) and 106.0 (2026). NOTE this counts only the four GF fabs we model; GF operates more sites, so treat it as a lower bound on the band rather than the true 12-22nm capacity of GF.

UMC reported capacity utilization of 78% in 4Q25 and 85% in 2Q26, and guided 3Q26 utilization to 90%+ (UMC 4Q25 results, 2026-01-28; 2Q26 results, 2026-07-29). 22/28nm was 37% of UMC revenue in 2Q26, and 22nm revenue reached a record in 4Q25 and rose 93% for full-year 2025 (same releases). UMC's utilization is company-wide: this record's utilization (85) is UMC's 2Q26 figure, and its allocation tier is a Silicon Analysts estimate.