The Guidance Hike in Context: What ASML's Q1 2026 Numbers Actually Say
ASML's Q1 2026 results were notable not for a single headline but for the convergence of multiple signals that together indicate a structural demand shift, not merely a cyclical uptick. Total net sales reached €8.8B in Q1, up ~13% year over year, with the installed base management segment—services, field upgrades, performance options—posting €2.5B, a ~25% YoY increase [2]. That service line growth matters as much as the systems number: it reflects an expanding EUV installed base whose operators are paying to extract more throughput from existing tools before new ones arrive.
EUV system sales contributed approximately €4.1B, or roughly 65% of total system revenue in Q1 [2]. Two High-NA systems were recognized in that figure, meaning the bulk of unit volume still came from Low-NA (NXE:3800E and predecessors). For the full year, ASML's CFO confirmed a target of over 60 Low-NA EUV shipments—approximately 25% more than 2025 levels—with High-NA units additive to that count [4]. This is the largest single-year EUV shipment target in the company's history and represents a meaningful test of ASML's own supply chain: EUV sources, optics, and reticle infrastructure are themselves long-lead components.
CEO Christophe Fouquet's framing was direct: "Demand for chips is outpacing supply" [4]. That statement, made in the context of ASML's order book, carries more analytical weight than a typical earnings-call formulation. When the equipment supplier says demand exceeds supply, it means the constraint is moving upstream—past foundry wafer capacity, past packaging, to the tools that make the wafers possible.
Q4 2025 bookings of €13.2B were a record, substantially exceeding consensus expectations [1]. At ASML's typical revenue recognition lag—systems are recognized on delivery and customer acceptance, which can trail booking by 12–18 months or more—the Q4 2025 book implies a delivery tail that extends well into 2027 and in some cases 2028.
Memory Fab EUV Adoption: The Structural Swing That Changes the Allocation Calculus
For most of EUV's commercial history, the primary buyers were logic foundries—TSMC, Samsung Foundry, and Intel Foundry—using the technology to pattern leading-edge transistor and interconnect layers at 7nm and below. Memory manufacturers were EUV adopters but at lower intensity: a single EUV layer or two on the most critical DRAM patterning steps.
That profile is changing. As DRAM makers push into 1z, 1α, and 1β node generations, the number of EUV layers per wafer is increasing. More critically, the emerging architecture discussions around 3D DRAM—where cell arrays are stacked vertically rather than scaled laterally—introduce lithography requirements that are qualitatively different from planar DRAM patterning. 3D DRAM structures require precise alignment across stacked layers, and the overlay and resolution specifications involved are beginning to pull memory fabs toward High-NA EUV discussions that, until recently, were almost exclusively a logic-foundry conversation [5].
The practical consequence is that memory fabs are now competing in the same EUV allocation queue as logic foundries. Samsung, SK Hynix, and Micron collectively represent a buyer cohort whose EUV intensity per wafer is rising faster than their wafer volume growth—a compounding effect on equipment demand. For context on the memory technology race and capital commitments driving this, our analysis of SK Hynix and Samsung's 2026 capacity race documents the scale of HBM4 investment that sits directly upstream of these lithography decisions.
| Buyer Segment | Primary EUV Node Range | EUV Layers/Wafer (approx.) | 2026 Demand Direction |
|---|---|---|---|
| Logic Foundry (TSMC, Samsung Foundry) | N3–N5 | 15–25+ | High, stable |
| Memory DRAM (Samsung, SK Hynix, Micron) | 1α–1β node | 5–12, rising | Growing rapidly |
| 3D DRAM (emerging) | Sub-1β, High-NA evaluations | TBD, architecture-dependent | Early-stage, watch 2027+ |
| Intel Foundry | 18A–20A equivalent | 10–20+ | Recovering, uncertain volume |
Note: EUV layer counts are directional estimates based on publicly disclosed node roadmaps; specific per-product figures are not publicly confirmed.
Equipment Lead Times: Why 2026 Shipments Don't Solve 2026 Capacity Needs
The standard industry framing—ASML ships more tools, capacity expands—understates the temporal mismatch between equipment ordering, delivery, installation, qualification, and productive output. Equipment lead times for EUV systems currently run in the range of 12–18 months from order to delivery for customers in the queue. Installation, cleanroom integration, and process qualification add further months. A tool ordered in Q1 2026 and delivered in late 2026 or early 2027 may not contribute to sellable wafer output until mid-to-late 2027 at the earliest.
This timeline dynamic is why ASML's record Q4 2025 bookings are a signal about 2027–2028 capacity, not 2026 capacity. For procurement teams and supply chain planners, the practical implication is that EUV capacity available in 2026 was largely committed in 2024–2025. The tools being ordered now are, in effect, a bet on demand structure 18–30 months out.
For buyers of advanced logic chips—particularly AI accelerators manufactured on TSMC N5/N4 and N3 nodes, where wafer prices run approximately $16k–$21k and $17k–$22k respectively—this lag means that near-term supply tightness is largely locked in regardless of ASML's 2026 shipment acceleration. Our foundry allocation status analysis covers where wafer capacity is and isn't available across the major foundries, and the EUV equipment constraint is a first-order input to that picture.
The installed base management revenue growth—~25% YoY at €2.5B—is also diagnostic here [2]. When customers spend heavily on performance upgrades and service options for existing tools, it signals that they are extracting every marginal wafer from current capacity while waiting for new tools to qualify. It is a leading indicator of tightness, not a lagging one.
High-NA EUV: Real Technology, Limited Near-Term Volume
The NXE:3800E remains the workhorse of the EUV fleet. The High-NA platform (EXE:5000 series) is in early production ramp, with two units recognized in Q1 2026 revenue [2]. High-NA EUV offers a higher numerical aperture that enables finer feature resolution without the multi-patterning complexity that adds cost and cycle time to Low-NA processes—but it comes at significantly higher capital cost per tool and introduces new challenges around anamorphic optics, smaller field size, and resist sensitivity.
The smaller field size of High-NA tools is a particularly important trade-off: it reduces throughput per exposure relative to Low-NA, which means more tools are needed to match equivalent wafer output. For fabs evaluating High-NA adoption, the economics are not straightforwardly better—they are better on resolution but require careful modeling against throughput and capital intensity.
For the 2026 shipment target, High-NA volume remains a small fraction of the 60+ unit count. The more strategically relevant question is whether High-NA volume scales meaningfully in 2027–2028 as the most advanced logic nodes require it. Memory fabs evaluating 3D DRAM architectures are watching High-NA qualification data closely, but capital commitments at scale remain a 2027+ decision for most DRAM manufacturers.
What the €13.2B Booking Record Actually Implies for Strategic Planning
At ASML's blended system ASP—which varies substantially between Low-NA and High-NA tools—a €13.2B single-quarter booking figure implies a very large number of systems committed [1]. Even assuming a mix weighted heavily toward High-NA (which carry reported prices in the €350M–€400M range per public disclosures), the unit count implied by that booking total is substantial and suggests that multiple major fabs accelerated ordering decisions simultaneously in Q4 2025.
The timing coincides with a period when hyperscaler AI capex commitments were being publicly announced at scale—including multi-year commitments in the $70B–$84B range from major cloud and AI infrastructure players. Those downstream spending commitments flow upstream through chip demand, through foundry capacity, and ultimately into EUV tool orders. Our analysis of the hyperscaler capex dynamics captures the demand-side mechanics that are driving this equipment cycle.
For strategic decision-makers, the key planning implication is this: EUV equipment availability is now a multi-year constraint, not a quarterly allocation question. Organizations that rely on advanced node wafers—whether for AI accelerators, advanced memory, or leading-edge logic—should treat EUV capacity as a strategic variable in supplier relationship planning, not a spot-market procurement item.
The EUV lithography market's projected trajectory from ~$26B in 2026 toward ~$52B by 2033 [6] reflects a consensus view that this constraint persists across the planning horizon. Whether that CAGR materializes depends on whether memory EUV intensity continues rising and whether High-NA volume scales as expected—two variables worth tracking closely through ASML's quarterly guidance disclosures.
For teams modeling the downstream cost implications of wafer pricing and EUV-intensive node economics, the Chip Cost Calculator provides a structured framework for sensitivity analysis across nodes, packaging architectures, and volume assumptions.
References & Sources
[1] Bellido, E. (LinkedIn). "ASML Reports Record €13.2B Orders, Strong 2026 Outlook for AI Chips." LinkedIn post citing ASML Q4 2025 results.
[2] "ASML Q1 2026: Surging EUV Demand Drives Guidance Hike." Industry analysis of ASML Q1 2026 earnings, April 2026.
[3] "ASML targets 25%+ boost in EUV shipments due to memory demand." Industry report, April 15, 2026.
[4] Reuters / Semiwiki. "ASML lifts 2026 forecast as surging AI chip demand boosts outlook." April 15, 2026. Includes CFO confirmation of 60 Low-NA EUV tool shipment target for 2026.
[5] "ASML Targets 60+ EUV Shipments in 2026 as Memory Fabs Accelerate Adoption." April 15, 2026.
[6] Persistence Market Research. "Extreme Ultraviolet (EUV) Lithography Market Size, Share, and Growth Forecast 2026–2033." Market valued at ~$26.2B in 2026, projected ~$52.3B by 2033 at ~10.4% CAGR.