Silicon Analysts
Memory & HBM

SK Hynix and Samsung: HBM4 Readiness, 1c DRAM Scaling, and What the 2026 Capacity Race Really Means

By Silicon Analysts
8 min read
Supply ChainMarket Dynamics

Executive Summary

The 2026 memory capacity race is not a uniform volume play — SK Hynix and Samsung are making structurally different wagers. SK Hynix is front-running AI inference with an aggressive 1c DRAM node ramp, while Samsung is chasing HBM market share recovery after well-documented yield setbacks on HBM4. The divergence in strategy creates meaningful supply and qualification risk that procurement teams and platform architects need to map carefully before locking in 2026-2027 memory sourcing commitments.

1SK Hynix 1c DRAM target: South Korean media reports indicate SK Hynix plans to scale 1c-node monthly wafer capacity from ~20K to 160K–190K 300mm wafers by end-2026 — roughly an 8x–9x increase from a single-node base.
2Samsung HBM recovery play: Samsung is targeting ~50% HBM production capacity growth in 2026, but qualification timelines for HBM4 remain the binding constraint, not installed wafer capacity.
3HBM cost materiality: HBM stacks represent ~34%–45% of total AI accelerator manufacturing cost across current-generation platforms, making supplier qualification a direct lever on system-level economics.
4Qualification risk is asymmetric: SK Hynix holds a demonstrable lead in HBM3E customer qualifications; Samsung's HBM4 path involves both yield recovery and a fresh qualification cycle with hyperscaler and OEM procurement teams.

The narrative entering 2026 was straightforward: AI demand is insatiable, HBM is sold out, build everything. The reality emerging from Samsung and SK Hynix's respective capacity strategies is considerably more textured. Both companies are expanding aggressively, but they are expanding into different segments of the AI memory stack, on different node timelines, and with meaningfully different qualification risk profiles. For procurement teams and platform architects, treating these expansions as interchangeable supply additions is an analytical error.

SK Hynix's 1c DRAM Bet: Scale Over Pedigree

The most structurally significant data point in the current expansion cycle is SK Hynix's reported plan to scale monthly production of its sixth-generation 10nm-class DRAM — the 1c node — from approximately 20,000 300mm wafers per month to somewhere between 160,000 and 190,000 wafers per month by end-2026 [5][6]. That represents an ~8x–9x ramp from a single node in roughly 12–18 months.

The scale of that commitment warrants scrutiny. Adding ~140K–170K wafer starts per month on a leading-edge DRAM node requires not just equipment procurement — where lead times themselves can run 12–18 months for EUV-dependent tools — but also cleanroom expansion, utility infrastructure, and a yield ramp that historically takes multiple quarters to mature. SK Hynix appears to be executing this partly through expansion of existing facilities and partly through new capacity additions, which is consistent with the company's stated infrastructure investment increase of more than 4x a prior announced figure [4].

The strategic logic points squarely at AI inference. As large language model deployment shifts from training-dominated workloads toward inference at scale, the memory profile changes: inference clusters consume large volumes of cost-optimized, high-capacity general-purpose DRAM alongside HBM, rather than pure HBM-heavy configurations. SK Hynix appears to be positioning 1c DRAM as the commodity workhorse for that inference buildout — a higher-volume, more predictable revenue stream than the lumpy, qualification-gated HBM market [5].

For buyers, the key variable to watch is yield maturation. The 1c node is SK Hynix's most advanced DRAM process, and yield curves on leading-edge DRAM nodes typically require two to four quarters of volume production before stabilizing. A ramp of this magnitude compresses that maturation timeline against a hard delivery schedule, which introduces qualification and consistency risk for early production lots.

Samsung's HBM4 Position: Capacity Is Not the Problem

Samsung's 2026 HBM story is a useful counterexample. The company has announced targets to expand HBM production capacity by approximately 50% in 2026 [3][4]. On its face, that sounds like a straightforward capacity response to a supply-constrained market. The complication is that Samsung's HBM constraint entering 2026 was never primarily about installed capacity — it was about yield and qualification.

Public reporting through late 2025 documented Samsung's HBM4 rollout delays driven by yield challenges [1]. Adding clean-room capacity to a process that hasn't achieved stable customer-qualifying yield does not convert into shippable, qualified product on the timelines that hyperscaler procurement cycles require. The distinction matters: Samsung can have 50% more HBM production capacity and still be supply-constrained at the customer level if HBM4 qualification timelines slip by even one or two quarters.

The qualification timeline issue is not hypothetical. The HBM certification process for a major AI accelerator platform involves both the memory vendor and the GPU/accelerator OEM, runs through multiple validation stages, and typically spans several months from first silicon to volume production approval. SK Hynix's demonstrated lead in HBM3E qualifications [2] means it enters the HBM4 cycle with existing customer relationships, established test infrastructure, and a comparative learning curve advantage on the integration protocols that matter to NVIDIA, AMD, and custom ASIC teams.

For a deeper treatment of how qualification cycles have shaped the competitive landscape across HBM generations, see our prior analysis of the HBM qualification race from 2022 through 2026.

HBM Cost Weight in AI Accelerator Economics

One reason the qualification competition is so commercially significant is the weight that HBM carries in total AI accelerator manufacturing cost. Using publicly grounded estimates from current-generation platforms:

PlatformHBM GenerationHBM CapacityEst. HBM CostEst. Total Mfg CostHBM Share of Total
NVIDIA H100 SXM5HBM380 GB~$1,350~$3,320~41%
NVIDIA H200 SXM5HBM3e141 GB~$1,500~$4,250~35%
NVIDIA B200HBM3e192 GB~$2,900~$6,400~45%
NVIDIA GB200 SuperchipHBM3e384 GB~$5,800~$13,500~43%
AMD MI300XHBM3192 GB~$2,900~$5,300~55%

Note: "Est. HBM Cost" covers HBM stack procurement only. "Est. Total Mfg Cost" covers logic die, HBM stack, and advanced packaging combined — it is not the sum of any subset of rows, but the all-in per-unit manufacturing cost estimate. Sources: Silicon Analysts canonical cost model.

Across these platforms, HBM consistently represents roughly 35%–55% of total manufacturing cost. That concentration means any disruption to HBM pricing — whether from Samsung's yield recovery diluting supply discipline or from SK Hynix's 1c ramp shifting cost curves on the DRAM side — flows directly into system-level economics for accelerator buyers. Procurement teams managing multi-year AI infrastructure programs should model both scenarios: one where Samsung successfully closes the HBM4 gap and exerts price pressure, and one where qualification delays maintain SK Hynix's pricing leverage through 2027.

For a live model of how HBM cost shifts affect accelerator economics, the HBM Market Analysis tool allows scenario testing across memory generations and vendor cost assumptions.

Capex Architecture: What the Investment Signals Reveal

Beyond the product-specific decisions, the capex structure of both expansions encodes strategic priorities worth reading carefully.

SK Hynix's reported infrastructure commitment — more than 4x a prior announced figure — is consistent with the scale math required for an ~8x–9x wafer capacity increase when equipment, facilities, and yield-support infrastructure are factored in [4]. Leading-edge DRAM capex intensity per wafer start is substantial: EUV scanner procurement, track equipment, and metrology tools collectively represent multi-billion-dollar commitments at this scale. The company's existing M15X facility in Cheongju appears to be the anchor of the near-term ramp, providing a shorter path to production qualification than a greenfield build.

Samsung's 50% HBM capacity expansion target is a more surgical commitment — targeted at a specific product segment rather than a broad node ramp [3]. The interpretation that favors Samsung is that this is disciplined capital allocation: invest in HBM specifically because that is where margin and strategic positioning are concentrated. The interpretation that cuts against Samsung is that without a resolved yield story, the capacity investment may sit underutilized until qualification milestones clear, creating negative operating leverage in the interim.

Both companies also signed a letter of intent with OpenAI in October 2025 for future supply, alongside broader hyperscaler commitments [4]. That kind of demand-side visibility is typically a prerequisite for authorizing multi-year capex at this scale — it de-risks the investment from a demand perspective while concentrating execution risk on the supply and qualification side.

The broader capacity expansion context across the AI accelerator supply chain — including wafer starts at TSMC and how DRAM capacity interacts with logic capacity planning — is covered in our 2024 Capacity Expansion analysis.

Qualification Timeline as the True Constraint Variable

The synthesis of both companies' positions points to qualification timeline as the variable that will determine whether expanded capacity translates into competitive revenue — and on what schedule.

For SK Hynix, the qualification path on 1c DRAM for AI inference is relatively well-defined: the node is an evolutionary step within a product category where the company already holds customer relationships and process credibility. Yield ramp risk exists, but the qualification process itself is not a new relationship-building exercise.

For Samsung on HBM4, the path is more complex. Yield stabilization is a prerequisite for qualification submission. Qualification itself then runs through customer validation cycles that are measured in months, not weeks. And competitive dynamics mean that hyperscalers managing AI accelerator roadmaps are not waiting for Samsung to clear qualification before committing production slots to SK Hynix or evaluating Micron's HBM trajectory. Samsung's capacity expansion will only convert to market share recovery if the yield story is resolved early enough in 2026 to enter qualification cycles while customers still have 2026–2027 sourcing decisions open.

For procurement teams building memory sourcing strategies around 2026–2027 AI infrastructure programs: the actionable read is to pressure-test supplier qualification status — not just capacity commitments — before finalizing allocations. A capacity commitment from a vendor still working through yield recovery is a different risk profile than one from a vendor in active qualification with your OEM partner. The SK Hynix 1Q26 mix cycle analysis provides additional context on how that qualification dynamic is already showing up in SK Hynix's revenue mix.

References & Sources

[1] SemiWiki Forum — Samsung delays HBM4 rollout to 2026 due to yield challenges, while SK Hynix strengthens lead in AI memory. semiwiki.com

[2] SK Hynix Newsroom — 2026 Market Outlook: SK Hynix's HBM to Fuel AI Memory Boom. news.skhynix.com

[3] Industry reporting — Samsung Expands HBM Production Capacity by 50% in 2026.

[4] Industry reporting — Samsung and SK Hynix to scale up memory production capacity in 2026 to meet AI demand, including October 2025 OpenAI letter of intent.

[5] Semicon Electronics — SK Hynix Bets on AI Inference Market with 800% DRAM Capacity Expansion. semicon-electronics.com

[6] Reddit r/hardware — SK Hynix to ramp up 1c DRAM production 8-fold in 2026. reddit.com/r/hardware

Sources & Methodology

Data Verified PublicAll data sourced from public filings, press releases, and published reports

Methodology

This analysis is based exclusively on publicly available information including quarterly earnings calls, investor presentations, SEC/regulatory filings, published analyst reports, industry conference proceedings, trade publications, and government disclosures. All cost models use cross-validated benchmarks derived from these public sources. No proprietary, classified, or confidential information is used.

The views expressed on this site are my own and do not represent those of my employer. This is a personal research project for educational purposes. All data is sourced exclusively from public filings, press releases, and published industry reports. No proprietary or confidential information is used.

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