Silicon Analysts Weekly · week of 2026-06-15 → 2026-06-22

Silicon Analysts Weekly: HBM4 qualifies across all three vendors, CoWoS expands

The take

CoWoS capacity is tracking toward 120,000–130,000 wafers/month by Q4 2026, roughly doubling from end-2025 levels — yet packaging, not wafer supply, remains the binding constraint on AI accelerator output. Simultaneously, all three memory vendors are now HBM4-qualified for Vera Rubin, but SK Hynix's 60% market share means allocation leverage stays concentrated. Bernstein's note that HBM prices would need to triple to match conventional DRAM margins is the structural tension readers are watching.

What moved this week

TSMC CoWoS CoWoS capacity — up — Q4 2026 ~120,000–130,000 wafers/month (midpoint ~127,000) vs ~65,000–80,000 wafers/month (end-2025 range; SemiVision estimates ~65k, TrendForce reports 75k–80k current capacity) (source)

AMD CoWoS customer allocation — up — Q3 2026 ~100K wafers (~11% of CoWoS allocation) (source)

Broadcom CoWoS customer allocation — up — Q3 2026 120K–130K wafers (~15% of CoWoS allocation) vs ~13–15% of total CoWoS demand (~150,000 wafers annually) (source)

NVIDIA CoWoS customer allocation — up — Q3 2026 710K–750K wafers (absolute); ~60% of CoWoS allocation (share) vs 2026-2027 800,000 to 850,000 wafers (source)

TSMC CoWoS CoWoS-L CoWoS capacity — up — 105k wafers per month by end-2026, rising to 141k wafers per month in 2027 (per JPMorgan) (source)

TSMC CoWoS CoWoS CoWoS capacity — up — 90,000–125,000 wafers/month by end of 2026 (central estimate ~110,000–115,000 WPM) vs null ~127,000 wafers/month (source)

Supply-chain & pricing signals

SK Hynix holds ~60% HBM market share, constraining hyperscaler allocation — concentration at one supplier is creating capacity allocation pressure for major AI infrastructure buyers. (Source)

SK Hynix market cap reaches $1.35 trillion, overtaking Samsung as Korea's most valuable company — 340% YTD gain reflects sustained pricing power and scarcity premium in high-end memory. (Source)

Bernstein: HBM prices would need to triple to match conventional DRAM margin economics — analysis flags structural tension between HBM capacity conversion costs and revenue-per-wafer versus standard DRAM. (Source)

DRAM shortage forces OEM product cancellations — Nothing cancelled a CMF phone launch citing RAM prices; memory cited as the most expensive component in current designs. (Source)

CPO/silicon photonics inspection tooling launched to address FAU manufacturing bottlenecks — Gen Precision's GTK-OSI1 targets fiber array unit yield constraints in co-packaged optics supply chains. (Source)

HBM watch

SK Hynix × NVIDIA H200 (HBM3E): Volume shipping — SK Hynix achieved first volume production of HBM3E for H200 and B200 accelerators. (source · timeline)

SK Hynix × NVIDIA Vera Rubin (HBM4): Qualified → Volume shipping — SK Hynix is now at scale on HBM4 for Vera Rubin, consistent with its fastest-qualification track record across generations. (source · timeline)

Samsung × NVIDIA Vera Rubin (HBM4): Qualified → Volume shipping — NVIDIA CEO confirmed June 5, 2026 that Samsung passed HBM4 certification for Vera Rubin and has moved to volume supply. (source · timeline)

Micron × NVIDIA Vera Rubin (HBM4): Qualified — NVIDIA CEO confirmed Micron passed HBM4 certification for Vera Rubin; 2026 HBM volumes reported as fully booked. (source · timeline)

Samsung × AMD MI400 (HBM4): Qualified — AMD's MI400 is committed primarily to Samsung HBM4, the first major AI socket Samsung has fully won this cycle. (source · timeline)

Samsung × AMD MI455X (HBM4): In qualification — Samsung and AMD signed an MOU aligning Samsung as primary HBM4 supplier for the MI455X GPU. (source · timeline)

Samsung × AMD MI350 (HBM3E 12-Hi): Qualified → Volume shipping — Samsung 12-Hi HBM3E confirmed in MI350X floorplan analysis; AMD officially confirmed Samsung and Micron supply at AI Advancing 2025. (source · timeline)

This week's analysis

Why CoWoS Lead Times — Not Wafer Capacity — Are the Real AI Bottleneck — TSMC is nearly doubling CoWoS capacity in 2026, yet lines stay booked at 52–78 week lead times. Why the booking window, not raw capacity, is the binding constraint on AI hardware.

Foundry Allocation Status 2026: Where Capacity Is and Isn't — Mid-2026 foundry allocation map: TSMC CoWoS fully booked with ~1M wafers of 2026 demand, NVIDIA ~60% locked, 2nm booked through 2028, HBM allocated. Live tracker + API.

AI engines are citing

AMD vs NVIDIA: The AI GPU War in Numbers

NVIDIA GPU Market Share 2024–2026: 87% Peak, What Comes Next

Hbm Analysis

Tool spotlight

Chip Cost Calculator — Model wafer, yield, packaging & HBM cost for any AI accelerator.

Sources this week