AI Accelerator Manufacturing Cost (COGS) — Historical Time Series Data
Estimated manufacturing cost breakdown for NVIDIA A100, H100, H200, B200 and AMD MI300X. Shows HBM shift from 33% to 45%+ of BOM.
AI Accelerator Manufacturing Cost (COGS)
Estimated manufacturing cost breakdown for NVIDIA A100, H100, H200, B200 and AMD MI300X. Shows HBM shift from 33% to 45%+ of BOM.
Data Table
| Period | Series | Value |
|---|---|---|
A100 (2020) | Logic Die | $400 |
A100 (2020) | HBM | $1,350 |
A100 (2020) | Packaging & Test | $750 |
H100 (2023) | Logic Die | $300 |
H100 (2023) | HBM | $1,350 |
H100 (2023) | Packaging & Test | $1,670 |
H200 (2024) | HBM | $1,500 |
H200 (2024) | Logic Die | $300 |
H200 (2024) | Packaging & Test | $2,450 |
MI300X (2024) | Logic Die | $600 |
MI300X (2024) | HBM | $2,900 |
MI300X (2024) | Packaging & Test | $1,800 |
B200 (2025) | Logic Die | $850 |
B200 (2025) | HBM | $2,900 |
B200 (2025) | Packaging & Test | $2,650 |
Methodology & Sources
Sources: Silicon Analysts (H100 Feb 2026), Epoch.ai (B200 Dec 2025), Deep Research (102 sources). NVIDIA/AMD do not disclose COGS; estimates from teardown analysis. Gross margin estimates based on analyst consensus.
Citations:
- Deep Research (102 sources) (Mar 2026)
- Silicon Analysts (Feb 2026)
- Silicon Analysts (Mar 2026)
- Silicon Analysts / SemiAnalysis (Mar 2026)
- Epoch.ai (Dec 2025)
Related Tools
Related Analysis
Market intelligence on this data
All market intelligence →SK Hynix Commits $5.8B to Advanced HBM Packaging Facility; TSMC Confirms 2027 Wafer Price Hikes Up to 10%
SK Hynix packaging CapEx: +$5.8B committed; TSMC mature-node wafer price hike: up to +10% effective 2027; advanced-node pricing direction unquantified but directionally upward per Barchart/TSMC guidance.
China Eyes Export Controls on AI Chips & Models; AMD Helios Rack Enters Market with Azure Deal
Geopolitical: Potential restriction on TSMC fab access for Chinese-designed advanced chips (scope/timing unquantified); AMD Helios: Azure H2 2026 deployment commitment (unit volume undisclosed).
TSMC Commits $100B+ Arizona Expansion, Accelerates 3nm Conversion to Meet AI Chip Surge
Capacity: TSMC U.S. CapEx raised by +$100B incremental; total U.S. commitment reaches ~$265B per Odaily/Reuters; annual CapEx guidance lifted to $60–64B. 5nm-to-3nm fab conversion timeline accelerated (no specific % capacity figure disclosed publicly).
TSMC $265B US CapEx Commitment + ASML 30% EUV Capacity Surge Signal Multi-Year AI Supply Expansion — with Equipment Price Hike Risk
TSMC CapEx: +$100B incremental US commitment (total $265B), 2026 CapEx at high end of $52–56B range; ASML EUV/DUV capacity: +30% per year for 2 years; ASML 2026 revenue guidance raised ~15–19% vs prior midpoint (€38B → €44B midpoint); ASML EUV price hike quantum not yet disclosed — wafer/packaging cost pass-through risk flagged but unquantified.
Frequently Asked Questions
- How much does it cost NVIDIA to manufacture an H100?
- The estimated total manufacturing cost (COGS) for an H100 SXM5 is approximately $3,320: roughly $300 for the 814mm² TSMC 4N logic die, $1,350 for HBM3 memory, $750 for CoWoS-S packaging, and $920 for test/assembly.
- Why is the B200 logic die cheaper than the H100 despite being more advanced?
- The B200 uses a chiplet design with two ~400mm² N4P dies (~800mm² total) instead of a single monolithic 814mm² die like the H100. Each smaller chiplet yields significantly better, driving per-die cost down to roughly $900 total for the logic despite using a more advanced node.
- What percentage of AI chip cost is HBM memory?
- HBM as a share of total BOM has grown from roughly 14% (A100) to 33% (H100) to 43% (H200) to 45%+ (MI300X). The B200 reverses this trend slightly at ~38% because its chiplet logic die is relatively cheap, but the absolute HBM cost continues to rise.