CoWoS Packaging Capacity (TSMC) — Historical Time Series Data
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
CoWoS Packaging Capacity (TSMC)
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
7 data points·Unit: wafers/month·Last updated: Mar 2026
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Data Table
| Period | Series | Value |
|---|---|---|
End 2023 | CoWoS Total Capacity | ••• |
Q1 2024 | CoWoS Total Capacity | ••• |
Q3 2024 | CoWoS Total Capacity | ••• |
End 2024 | CoWoS Total Capacity | ••• |
Mid-2025 | CoWoS Total Capacity | 55,000 wpm |
End 2025 | CoWoS Total Capacity | 72,500 wpm |
End 2026 (target)P | CoWoS Total Capacity | 125,000 wpm |
Methodology & Sources
Sources: Nomad Semi (Sep 2024), TweakTown (Jun 2024), SemiVision/SemiWiki (Dec 2024), GlobalSemiResearch (Dec 2025).
Citations:
- Nomad Semi (Sep 2024)
- Silicon Analysts interpolation (Mar 2026)
- TweakTown / Ctee (Jun 2024)
- SemiVision / SemiWiki (Dec 2024)
- Nomad Semi / SemiVision (Dec 2025)
- GlobalSemiResearch (Dec 2025)
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Frequently Asked Questions
- What is TSMC CoWoS capacity in 2026?
- TSMC CoWoS advanced packaging capacity is projected to reach 120,000–130,000 wafer starts per month by end of 2026, up from just 13,000 wpm at end of 2023. This roughly 10x expansion is driven by demand from NVIDIA B200/GB200 and AMD MI300X/MI400.
- Why is CoWoS a bottleneck for AI chips?
- CoWoS (Chip-on-Wafer-on-Substrate) is the only production-proven 2.5D packaging technology for integrating large logic dies with HBM stacks. Every NVIDIA H100, H200, and B200 requires CoWoS. Lead times exceeded 50 weeks in 2024, making it the primary constraint on AI chip supply.