CoWoS Packaging Capacity (TSMC) — Historical Time Series Data
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
CoWoS Packaging Capacity (TSMC)
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
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Data Table
| Period | Series | Value |
|---|---|---|
End 2023 | CoWoS Total Capacity | ••• |
Q1 2024 | CoWoS Total Capacity | ••• |
Q3 2024 | CoWoS Total Capacity | ••• |
End 2024 | CoWoS Total Capacity | ••• |
Mid-2025 | CoWoS Total Capacity | 55,000 wpm |
End 2025 | CoWoS Total Capacity | 72,500 wpm |
End 2026 (target)P | CoWoS Total Capacity | 125,000 wpm |
Methodology & Sources
Sources: Nomad Semi (Sep 2024), TweakTown (Jun 2024), SemiVision/SemiWiki (Dec 2024), GlobalSemiResearch (Dec 2025).
Citations:
- Nomad Semi (Sep 2024)
- Silicon Analysts interpolation (Mar 2026)
- TweakTown / Ctee (Jun 2024)
- SemiVision / SemiWiki (Dec 2024)
- Nomad Semi / SemiVision (Dec 2025)
- GlobalSemiResearch (Dec 2025)
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Market intelligence on this data
All market intelligence →TSMC CoWoS Yield Confirmed at 98-99% in HVM; Nvidia Weighs 8-Stack HBM4E Fallback for Rubin Ultra
CoWoS yield: 98-99% confirmed in HVM (positive); HBM4E 12-stack yield risk flagged — potential stack-count reduction from 12 to 8 layers (est. HBM capacity-per-die reduction of ~33% if downgrade confirmed); TSMC 2026 CapEx raised to $60-64B record (capacity positive).
Nvidia Rubin Ultra HBM Spec Downgrade Under Review as HBM4/4E Supply Crunch Deepens Through 2027
Customer HBM4 fill rates at 60–70% of ordered volumes (Micron-confirmed); HBM4 BOM cost for GPU vendors estimated at ~2x HBM3E per Korean press citing industry sources; CoWoS lead times confirmed at 52+ weeks; ABF substrate orders extending into 2028.
Nvidia-SK Hynix & Samsung-Broadcom Lock In $950B HBM Supply Agreements, Securing Next-Gen Memory Pipeline Through 2030
SK Hynix: $750B long-term HBM supply commitment to U.S. customers (led by Nvidia); Samsung: $200B memory + foundry + packaging commitment to Broadcom through 2030; SK Telecom 2GW AI data center powered by HBM4 targeting 2027 online date; TSMC CoWoS and advanced packaging capacity described as largely booked through 2027.
China Eyes Export Controls on AI Chips & Models; AMD Helios Rack Enters Market with Azure Deal
Geopolitical: Potential restriction on TSMC fab access for Chinese-designed advanced chips (scope/timing unquantified); AMD Helios: Azure H2 2026 deployment commitment (unit volume undisclosed).
Frequently Asked Questions
- What is TSMC CoWoS capacity in 2026?
- TSMC CoWoS advanced packaging capacity is projected to reach 120,000–130,000 wafer starts per month by end of 2026, up from just 13,000 wpm at end of 2023. This roughly 10x expansion is driven by demand from NVIDIA B200/GB200 and AMD MI300X/MI400.
- Why is CoWoS a bottleneck for AI chips?
- CoWoS (Chip-on-Wafer-on-Substrate) is the only production-proven 2.5D packaging technology for integrating large logic dies with HBM stacks. Every NVIDIA H100, H200, and B200 requires CoWoS. Lead times exceeded 50 weeks in 2024, making it the primary constraint on AI chip supply.